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Semicustom Logic

ASIC vs. FPGA Logic -
ASIC Design Chart

(This page is not intended for small screens.)
by Vaughn Aubuchon

Here is a brief summary of digital Integrated Circuit logic implementation.

Semicustom Logic Chart

ASIC Suppliers

List of Manufacturers

Glossary of Terms

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Implementation strategies are organized by semiconductor memory technology, to indicate possible cost reduction migration paths. All digital IC semiconductor solutions are first separated into two main categories - Standard (or universal) Logic, and Application Specific Integrated Circuit (ASIC) Logic. ASIC design may be custom, or semicustom. User-programmable logic becomes confusing, and must be separated between "PLD" devices, and FPGA devices.

Which should you choose for ASIC design, gate array or FPGA? Many factors are involved, including time-to-market, complexity (gate count), time to working silicon, ease of implementing design changes, anticipated market size, cost considerations, ASIC vendor track record, etc.
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Click on Graphic to Enlarge
ASIC Design Alternatives Chart - Digital IC Solutions




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     ASIC Suppliers

Gate Arrays -

Atmel, Chip Express, Fujitsu,
LSI Logic, Oki, Toshiba, TSMC

Standard Logic Suppliers

A. - CPLDs (fuse-based) -

AMD, intel

B. - CPLDs (UV-based) -

Altera, Atmel, Xylinx

C. - CPLDs (EE-based) -

AMD, Atmel, Cypress, Lattice

D. - FPGAs (fuse-based) -

Actel, Quicklogic

E. - FPGAs (SRAM-based) -

Altera, Atmel, Xilinx

Standard Logic (CMOS, TTL) -

Quality, SGS, Toshiba




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     List of ASIC Manufacturers

Actel -

Now Microsemi

Altera -

AMD -

Atmel -

Chip Express -

Cypress -

Fujitsu -

ICT -

Defunct - Chapter 11

Intel -

Lattice -

LSI Logic -

Oki Semi. -

Quality Semi. -

Quicklogic -

SGS -

Toshiba -

TSMC -

Xilinx -





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     Glossary of Terms

ASIC -

Application-Specific Integrated Circuit

ASSP -

Application-Specific Standard Part

CMOS -

Complementary Metal-Oxide Semiconductor

CPLD -

Complex Programmable Logic Device

DLM -

Dual-Layer Metal

DRAM -

Dynamic Random-Access Memory

EE -

Electrically Erasable

EEPLD -

Electrically-Erasable Programmable Logic Device

EEPROM -

Electrically-Erasable Programmable Read-Only Memory

EPLD -

Erasable-Programmable Logic Device

EPROM -

Electrically-Programmable Read-Only Memory

FPGA -

Field-Programmable Gate Array

FPIC -

Field-Programable Integrated Circuit

FPLA -

Field-Programmable Logic Array

GAL -

Generic Array Logic

Gate Array -

Gate Array wiki

HAL -

Hard-wired Array Logic

HDL -

Hardware Description Language

IC -

Integrated Circuit

LPGA -

Laser-Programmable Gate Array

Metal mask -

The pattern of a metal fabrication layer

Migration
Path -

Changing a circuit's implementation technology, for the purpose of cost reduction, or gaining higher performance, or both

µC -

Micro Controller

µP -

Micro Processor

NRE -

Non-recurring Engineering Cost

OTP -

One-Time Programmable

PAL -

Programmable Array Logic (MMI)

PEEL -

Programmable Electrically-Erasable Logic (ICT)

PLA -

Programmable Logic Array

PLD -

Programmable Logic Device

PROM -

Programmable Read-Only Memory

RAM -

Random-Access Memory

Random
Logic -

Circuit Design Technique

SLM -

Single-Layer Metal

SPLD -

Simple Programmable Logic Device

SRAM -

Static Random Access Memory

S. C. -

Standard Cell

TTL -

Transistor-Transistor Logic

UPIC -

User-Programmable Integrated Circuit

UV -

Erasable by Ultraviolet light

VHDL -

VHS Hardware Description Language

Standard
Logic -

7400 Series I.C.s = TTL, CMOS, etc

For clarity,
I have hyphenated compound adjectives.




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Vaughn's Other
Semiconductor Related Pages

* ASIC vs. FPGA

*
CPU Evolution

*
Electronics Distributors

*
Hollywood All-Jumps Tester

*
Semiconductor Manufacturers

*
Timing Diagram (generic)

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Tags: ASIC design chart, digital logic

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This Vaughns FPGA vs. Gate Arrays ASIC
Design Chart was last updated on 2019-11-26.